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  description the ICX098AK is a diagonal 4.5mm (type 1/4) interline ccd solid-state image sensor with a square pixel array which supports vga format. progressive scan allows all pixels signals to be output independently within approximately 1/30 second. also, the adoption of monitoring mode allows output to an ntsc monitor without passing through the memory. this chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still image without a mechanical shutter. high resolution and high color reproductivity are achieved through the use of r, g, b primary color mosaic filters. further, high sensitivity and low dark current are achieved through the adoption of had (hole-accumulation diode) sensors. this chip is suitable for applications such as electronic still cameras, pc input cameras, etc. features progressive scan allows individual readout of the image signals from all pixels. high horizontal and vertical resolution (both approx. 400tv-lines) still image without a mechanical shutter. supports monitoring mode square pixel supports vga format horizontal drive frequency: 12.27mhz no voltage adjustments (reset gate and substrate bias are not adjusted.) r, g, b primary color mosaic filters on chip high resolution, high color reproductivity, high sensitivity, low dark current continuous variable-speed shutter low smear excellent antiblooming characteristics horizontal register: 3.3v drive 14-pin high precision plastic package (enables dual-surface standard) device structure interline ccd image sensor image size: diagonal 4.5mm (type 1/4) number of effective pixels: 659 (h) 494 (v) approx. 330k pixels total number of pixels: 692 (h) 504 (v) approx. 350k pixels chip size: 4.60mm (h) 3.97mm (v) unit cell size: 5.6m (h) 5.6m (v) optical black: horizontal (h) direction: front 2 pixels, rear 31 pixels vertical (v) direction: front 8 pixels, rear 2 pixels number of dummy bits: horizontal 16 vertical 5 substrate material: silicon ?1 ICX098AK e96533c0y-ps diagonal 4.5mm (type 1/4) progressive scan ccd image sensor with square pixel for color cameras sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. aaaaa a aaa a a aaa a a aaa a aaaaa pin 1 v 2 31 2 8 pin 8 h optical black position (top view) 14 pin dip (plastic) ? wfine ccd is a registered trademark of sony corporation. represents a ccd adopting progressive scan, primary color filter and square pixel.
v dd , v out , rg sub v 2a , v 2b sub v 1 , v 3 , v l sub h 1 , h 2 , gnd sub c sub sub v dd , v out , rg, c sub gnd v 1 , v 2a , v 2b , v 3 gnd h 1 , h 2 gnd v 2a , v 2b v l v 1 , v 3 , h 1 , h 2 , gnd v l voltage difference between vertical clock input pins h 1 h 2 h 1 , h 2 v 3 2 ICX098AK pin no. symbol description pin no. symbol description 1 2 3 4 5 6 7 v 1 v 3 v 2a v 2b v l gnd v out vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock protective transistor bias gnd signal output 8 9 10 11 12 13 14 v dd gnd sub c sub rg h 1 h 2 supply voltage gnd substrate clock substrate bias ? 1 reset gate clock horizontal register transfer clock horizontal register transfer clock pin description g r g r g r g g b b b g vertical register horizontal register v out gnd v l v 2b v 2a v 3 v 1 v dd gnd sub c sub rg h 1 h 2 note) note) : photo sensor g g b b b g g r g r g r 9 10 11 12 13 14 8 1 2 3 4 5 6 7 block diagram and pin configuration (top view) ? 1 dc bias is generated within the ccd, so that this pin should be grounded externally through a capacitance of 0.1f. against sub against gnd against v l between input clock pins storage temperature operating temperature absolute maximum ratings 40 to +10 50 to +15 50 to +0.3 40 to +0.3 25 to 0.3 to +18 10 to +18 10 to +5 0.3 to +28 0.3 to +15 to +15 5 to +5 13 to +13 30 to +80 10 to +60 v v v v v v v v v v v v v c c item ratings unit remarks ? 2 +24v (max.) when clock width < 10s, clock duty factor < 0.1%. ? 2
3 ICX098AK clock voltage conditions item readout clock voltage v vt v vh02a v vh1 , v vh2a , v vh2b , v vh3 v vl1 , v vl2a , v vl2b , v vl3 v 1 , v 2a , v 2b , v 3 | v vl1 v vl3 | v vhh v vhl v vlh v vll v h v hl v rg v rglh v rgll v rgl v rglm v sub 14.55 0.05 0.2 5.8 5.2 3.0 0.05 3.0 19.75 15.0 0 0 5.5 5.5 3.3 0 3.3 20.5 15.45 0.05 0.05 5.2 5.8 0.1 0.3 1.0 0.5 0.5 5.25 0.05 5.5 0.4 0.5 21.25 v v v v v v v v v v v v v v v v 1 2 2 2 2 2 2 2 2 2 3 3 4 4 4 5 v vh = v vh02a v vl = (v vl1 +v vl3 )/2 high-level coupling high-level coupling low-level coupling low-level coupling low-level coupling low-level coupling horizontal transfer clock voltage reset gate clock voltage substrate clock voltage vertical transfer clock voltage symbol min. typ. max. unit waveform diagram remarks bias conditions item supply voltage protective transistor bias substrate clock reset gate clock v dd v l sub rg 14.55 15.0 ? 1 ? 2 ? 2 15.45 v symbol min. typ. max. unit remarks dc characteristics item supply current i dd 6.0 ma symbol min. typ. max. unit remarks ? 1 v l setting is the v vl voltage of the vertical transfer clock waveform, or the same power supply as the v l power supply for the v driver should be used. ? 2 do not apply a dc bias to the substrate clock and reset gate clock pins, because a dc bias is generated within the ccd.
4 ICX098AK clock equivalent circuit constant item capacitance between vertical transfer clock and gnd c v1 c v2a , c v2b c v3 c v12a , c v2b1 c v2a3 , c v32b c v13 c h1 , c h2 c hh c rg c sub r 1 r 2a , r 2b r 3 r gnd r h r h2 r rg 1200 470 2200 470 390 10 22 68 3 220 20 43 36 43 12 30 62 pf pf pf pf pf pf pf pf pf pf ? ? ? ? ? k ? ? capacitance between vertical transfer clocks capacitance between horizontal transfer clock and gnd capacitance between horizontal transfer clocks capacitance between reset gate clock and gnd capacitance between substrate clock and gnd vertical transfer clock series resistor vertical transfer clock ground resistor horizontal transfer clock series resistor horizontal transfer clock ground resistor reset gate clock series resistor symbol min. typ. max. unit remarks r h r h h 2 h 1 c h1 c h2 c hh v 1 c v12a v 2a v 2b v 3 c v32b c v2a3 c v2b1 c v13 c v1 c v2a c v2b c v3 r gnd r 2b r 1 r 3 r 2a vertical transfer clock equivalent circuit horizontal transfer clock equivalent circuit r h2 r rg rg c rg reset gate clock equivalent circuit
5 ICX098AK drive clock waveform conditions (1) readout clock waveform (2) vertical transfer clock waveform ii ii 100% 90% 10% 0% v vt tr twh tf m 0v m 2 v 1 v 3 v 2a , v 2b v vh1 v vhh v vh v vhl v vlh v vl1 v vl01 v vl v vll v vh3 v vhh v vh v vhl v vlh v vl03 v vl v vll v v1 = v vh1 v vl01 v v2a = v vh02a v vl2a v v2b = v vh02b v vl2b v v3 = v vh3 v vl03 v vh = v vh02a v vl = (v vl01 + v vl03 ) /2 v vl3 = v vl03 v vlh v vl2a , v vl2b v vll v vl v vh v vhh v vh02a , v vh02b v vh2a , v vh2b v vhl v t note) readout clock is used by composing vertical transfer clocks v 2a and v 2b .
6 ICX098AK twh tf tr 90% 10% v hl twl h 1 two h 2 v rgl v rgll v rglh twl v rgh rg waveform v rglm tr twh tf v cr point a (3) horizontal transfer clock waveform cross-point voltage for the h 1 rising side of the horizontal transfer clocks h 1 and h 2 waveforms is v cr . the overlap period for twh and twl of horizontal transfer clocks h 1 and h 2 is two. (4) reset gate clock waveform v h v rg v h 2 v rglh is the maximum value and v rgll is the minimum value of the coupling waveform during the period from point a in the above diagram until the rising edge of rg. in addition, v rgl is the average value of v rglh and v rgll . v rgl = (v rglh + v rgll )/2 assuming v rgh is the minimum value during the interval twh, then: v rg = v rgh v rgl negative overshoot level during the falling edge of rg is v rglm . (5) substrate clock waveform 90% 100% 10% 0% v sub tr twh tf m m 2 v sub (a bias generated within the ccd)
7 ICX098AK readout clock vertical transfer clock during imaging during parallel-serial conversion reset gate clock substrate clock v t v 1 ,v 2a , v 2b , v 3 h 1 h 2 h 1 h 2 rg sub 2.3 25.5 28 11 1.5 2.5 30.5 33 12 1.8 28 25.5 33 30.5 63.5 0.5 9 9 0.01 0.01 3 16.5 14 0.5 15 0.5 9 9 0.01 0.01 3 350 16.5 14 0.5 s ns ns s ns s during readout ? 1 ? 2 during drain charge horizontal transfer clock item symbol twh twl tr tf min. typ. max. min. typ. max. min. typ. max. min. typ. max. unit remarks horizontal transfer clock h 1 , h 2 21.5 25.5 ns item symbol two min. typ. max. unit remarks ? 1 when vertical transfer clock driver cxd1267an is used. ? 2 tf tr 2ns, and the cross-point voltage (v cr ) for the h 1 rising side of the h 1 and h 2 waveforms must be at least v h /2 [v]. clock switching characteristics r g b wave length [nm] relative response 0.2 0.4 0.6 0.8 1 0 350 400 450 500 550 600 650 700 spectral sensitivity characteristics (includes lens characteristics, excludes light source characteristics)
8 ICX098AK image sensor characteristics (ta = 25 c) item g sensitivity sensitivity comparison saturation signal smear video signal shading uniformity between video signal channels dark signal dark signal shading line crawl g line crawl r line crawl b lag sg rr rb vsat sm shg ? srg ? sbg vdt ? vdt lcg lcr lcb lag 440 0.3 0.4 500 550 0.45 0.55 0.001 0.6 0.7 0.0025 20 25 8 8 4 1 3.8 3.8 3.8 0.5 mv mv % % % % % mv mv % % % % 1 1 1 2 3 4 4 5 5 6 7 8 8 8 9 ta = 60 c zone 0 and i zone 0 to ii ' ta = 60 c ta = 60 c symbol min. typ. max. unit measurement method remarks zone definition of video signal shading 10 12 494 (v) 12 12 659 (h) v 10 h 8 h 8 v 10 effective pixel region ignored region zone 0, i zone ii , ii ' r b measurement system ccd c.d.s s/h amp ccd signal output [ ? a] gr/gb channel signal output [ ? b] gr/gb s/h r/b r/b channel signal output [ ? c] note) adjust the amplifier gain so that the gain between [ ? a] and [ ? b], and between [ ? a] and [ ? c] equals 1.
9 ICX098AK image sensor characteristics measurement method color coding and readout of this image sensor the primary color filters of this image sensor are arranged in the layout shown in the figure on the left (bayer arrangement). gr and gb denote the g signals on the same line as the r signal and the b signal, respectively. all pixels signals are output successively in a 1/30s period. the r signal and gr signal lines and the gb signal and b signal lines are output successively. readout modes the diagram below shows the output methods for the following two readout modes. horizontal register gb r gb r b gr b gr gb r gb r b gr b gr color coding diagram g r g r r g r b g b g g b g 7 6 5 4 3 2 1 v out 7 6 5 4 3 2 1 v out g r g r r g r b g b g g b g progressive scan mode monitoring mode note) blacked out portions in the diagram indicate pixels which are not read out. 1. progressive scan mode in this mode, all pixel signals are output in non-interlace format in 1/30s. the vertical resolution is approximately 400tv-lines and all pixel signals within the same exposure period are read out simultaneously, making this mode suitable for high resolution image capturing. 2. monitoring mode the signals for all effective areas are output during a single field period of ntsc standard (approximately 1/60s) by repeating readout pixels and non-readout pixels every two lines. the vertical resolution is approximately 200tv-lines. note that the same pixel signal is output for both odd and even fields. since signals are output in a format which conforms to ntsc, the external circuit can be simplified when monitoring using an ntsc monitor.
10 ICX098AK measurement conditions 1) in the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) in the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (ob) is used as the reference for the signal output, which is taken as the value of the gr/gb signal output or the r/b signal output of the measurement system. definition of standard imaging conditions 1) standard imaging condition i : use a pattern box (luminance 706cd/m 2 , color temperature of 3200k halogen source) as a subject. (pattern for evaluation is not applicable.) use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter and image at f5.6. the luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) standard imaging condition ? : image a light source (color temperature of 3200k) with a uniformity of brightness within 2% at all angles. use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter. the luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. g sensitivity, sensitivity comparison set to standard imaging condition i . after selecting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (v gr , v gb , v r and v b ) at the center of each gr, gb, r and b channel screens, and substitute the values into the following formula. v g = (v gr + v gb )/2 sg = v g [mv] rr = v r /v g rb = v b /v g 2. saturation signal set to standard imaging condition ii . after adjusting the luminous intensity to 20 times the intensity with the average value of the gr signal output, 150mv, measure the minimum values of the gr, gb, r and b signal outputs. 3. smear set to standard imaging condition ii . with the lens diaphragm at f5.6 to f8, first adjust the average value of the gr signal output to 150mv. measure the average values of the gr signal output, gb signal output, r signal output and b signal output (gra, gba, ra, ba), and then adjust the luminous intensity to 500 times the intensity with average value of the gr signal output, 150mv. after the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective h blankings, measure the maximum value (vsm [mv]), independent of the gr, gb, r and b signal outputs, and substitute the values into the following formula. sm = vsm 100 [%] (1/10v method conversion value) 4. video signal shading set to standard imaging condition ii . with the lens diaphragm at f5.6 to f8, adjust the luminous intensity so that the average value of the gr signal output is 150mv. then measure the maximum (grmax [mv]) and minimum (grmin [mv]) values of the gr signal output and substitute the values into the following formula. shg = (grmax grmin)/150 100 [%] 100 30 1 500 gra + gba + ra + ba 4 1 10
11 ICX098AK 5. uniformity between video signal channels after measuring 4, measure the maximum (rmax [mv]) and minimum (rmin [mv]) values of the r signal and the maximum (bmax [mv]) and minimum (bmin [mv]) values of the b signal, and substitute the values into the following formula. ? srg = (rmax rmin)/150 100 [%] ? sbg = (bmax bmin)/150 100 [%] 6. dark signal measure the average value of the signal output (vdt [mv]) with the device ambient temperature 60 c and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 7. dark signal shading after measuring 6, measure the maximum (vdmax [mv]) and minimum (vdmin [mv]) values of the dark signal output and substitute the values into the following formula. ? vdt = vdmax vdmin [mv] 8. line crawl set to standard imaging condition ii . adjusting the luminous intensity so that the average value of the gr signal output is 150mv, and then insert r, g, and b filters and measure the difference between g signal lines ( ? glr, ? glg, ? glb [mv]) as well as the average value of the g signal output (gar, gag, gab). substitute the values into the following formula. lci = 100 [%] (i = r, g, b) 9. lag adjust the gr signal output value generated by strobe light to 150mv. after setting the strobe light so that it strobes with the following timing, measure the residual signal (vlag). substitute the value into the following formula. lag = (vlag/150) 100 [%] vlag (lag) gr signal output 150mv light vd v2a strobe light timing output ? gli gai
12 ICX098AK drive circuit h 2 h 1 rg v l c sub sub gnd v dd 12345 6 7 v 1 v 2a v 2b v 3 gnd v out 14 13 12 11 icx098 (bottom view) 0.1 1m 2200p 33/20v 3.9k ccd out 2sk523 100 19 18 17 16 15 14 13 12 11 cxd1267an 20 1 xsub 2 3 4 5 6 7 8 9 10 22/20v 10 9 8 0.01 15v 22/16v 3.3/16v 5.5v 100k h1 h2 rg 1/20v 0.1 1/35v xv1 xv2a xsg1 xsg2 xv3 xv2b
13 ICX098AK sensor readout clock timing chart progressive scan mode xv1 xv2a xv2b xv3 hd v1 v2a v2b v3 42.2s (520 bits) 2.53s (31 bits) 81.4ns (1 bit) xsg1 xsg2 sensor readout clocks xsg1 and xsg2 are used by composing xv2a and xv2b.
hd 42.2s (520 bits) 2.53s (31 bits) v1 v2a v2b v3 81.4ns (1 bit) xv1 xv2a xv2b xv3 xsg1 xsg2 sensor readout clock xsg1 is used by composing xv2a. 14 ICX098AK sensor readout clock timing chart monitoring mode
15 ICX098AK drive timing chart (vertical sync) progressive scan mode vd hd v1 v2a v2b v3 ccd out 525 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 23 4 5 6 7 8 9 1011 504 510 520 525 1 2 3 4 5 6 7 12345678 494 1234567812
16 ICX098AK drive timing chart (vertical sync) monitoring mode fld hd 525 1 2 3 4 5 6 7 8 9 520 10 11 12 13 14 15 16 17 18 19 20 260 261 262 263 264 265 270 275 280 285 blk v1 v2a v2b v3 vd ccd out 1 2 56 910 125 6 14 13 17 18 910 125 6 14 13 17 18 1256 486 489 490 493 494 486 489 490 493 494
17 ICX098AK drive timing chart (horizontal sync) progressive scan mode hd blk clk 1 rg 78 shp v1 shd v2a v2b v3 sub h2 h1 140 780
18 ICX098AK drive timing chart (horizontal sync) monitoring mode clk rg shd hd 1 78 shp sub h2 h1 blk v1 v2a v2b v3 780 140
19 ICX098AK notes on handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non-chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensor. e) for the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) soldering a) make sure the package temperature does not exceed 80 c. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a ground 30w soldering iron and solder each pin in less than 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an image sensor, do not use a solder suction equipment. when using an electric desoldering tool, use a thermal controller of the zero cross on/off type and connect it to ground. 3) dust and dirt protection image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. clean glass plates with the following operation as required, and use them. a) perform all assembly operations in a clean room (class 1000 or less). b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if the grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) when a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. do not reuse the tape. 4) installing (attaching) a) remain within the following limits when applying a static load to the package. do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (this may cause cracks in the package.) b) if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. compressive strength 50n cover glass plastic package 50n 1.2nm torsional strength aaaa aaaa aaaa aaaa aaaa aaaa
20 ICX098AK c) the adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution. d) the notch of the package is used for directional index, and that can not be used for reference of fixing. in addition, the cover glass and seal resin may overlap with the notch of the package. e) if the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) acrylate anaerobic adhesives are generally used to attach ccd image sensors. in addition, cyano- acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) others a) do not expose to strong light (sun rays) for long periods, color filters will be discolored. when high luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the image-plane may become excessive and discolor of the color filter will possibly be accelerated. in such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. for continuous using under cruel condition exceeding the normal using condition, consult our company. b) exposure to high temperature or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. c) the brown stain may be seen on the bottom or side of the package. but this does not affect the ccd characteristics. d) this package has 2 kinds of internal structure. however, their package outline, optical size, and strength are the same. the cross section of lead frame can be seen on the side of the package for structure a. aaa structure a structure b chip metal plate (lead frame) package cross section of lead frame
21 ICX098AK package outline unit: mm 2.5 7.0 2.5 1.0 0.5 5.0 14 5.0 1 8.9 7 10.0 0.1 8.9 10.0 0.1 8 10.16 0? to 9? 0.25 8 14 7 1 1.7 1.7 7.0 2.5 1.0 3.35 0.15 2.6 3.5 0.3 1.27 0.3 0.46 1.27 14 pin dip (400mil) 0.3 v h 1. ? is the center of the effective image area. 2. the two points ? of the package are the horizontal reference. the point ?' of the package is the vertical reference. 3. the bottom ? of the package, and the top of the cover glass ? are the height reference. 4. the center of the effective image area relative to ? and ?' is (h, v) = (5.0, 5.0) 0.15mm. 5. the rotation angle of the effective image area relative to h and v is 1?. 6. the height from the bottom ? to the effective image area is 1.41 0.10mm. the height from the top of the cover glass ? to the effective image area is 1.94 0.15mm. 7. the tilt of the effective image area relative to the bottom ? is less than 25 m. the tilt of the effective image area relative to the top ? of the cover glass is less than 25 m. 8. the thickness of the cover glass is 0.75mm, and the refractive index is 1.5. 9. the notch of the package is used only for directional index, that must not be used for reference of fixing. c d b a b' ~ ~ ~ m package structure package material lead treatment lead material package mass plastic gold plating 42 alloy 0.60g drawing number as-d3-01(e) sony corporation


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